Transistors, inductors, capacitors and varactors are widely used radio frequency (RF) semiconductor devices. Recently, silicon has become widely used in fabricating RF semiconductor devices for the purpose of reducing manufacturing costs. However, when an RF semiconductor device is made of silicon, certain characteristics thereof may be deteriorated.
For example, if a transistor, e.g., a MOSFET, is used in an RF circuit operating at high frequency, it is necessary to increase an operating frequency (Ft, Fmax) of the transistor. Factors effecting the operating frequency of MOSFETs include the parasitic capacitance between the gate and the substrate of the MOSFET, the resistance of the gate line, and the like. If the RF MOSFET is produced in a semiconductor manufacturing process, since a greater current, that is, a large transconductance gm of the RF MOSFET is required, the gate width thereof must be enlarged.
A prior art method for manufacturing a conventional RF semiconductor device will now be described with reference to the accompanying drawings. FIG. 1 shows a top plan view of a conventional RF semiconductor device. FIGS. 2A and 2B are cross-sectional views of the conventional RF semiconductor device taken along lines X-X′ and Y-Y′ shown in FIG. 1, respectively.
Referring to FIG. 1, a gate line 15 is formed on an active region 10 in a longitudinally elongated zigzag shape. A plurality of contact holes 19 are formed between the zigzags of the gate line 15. The contact holes are formed at a constant distance from one another. A portion of the gate line 15, as shown in FIG. 1, is formed over an inactive region, i.e., an element isolation region. Some of the contact holes 19 are also formed on the gate line 15 within the element isolation region.
As shown in FIG. 2A, a trench 13 is formed in a semiconductor substrate 11 and then the gate line 15 is formed on the semiconductor substrate 11. Next, an insulating layer 17 is formed on the semiconductor substrate 11 having the gate line 15 thereon. The insulating layer 17 is then selectively patterned to thereby form the contact holes 19 which expose the semiconductor substrate 11 and the gate line 15. Next, a first conductive material is deposited on the insulating layer 17 and in the contact holes 19. The first conductive material is then planarized to thereby form contact plugs 21.
Next, a second conductive material is deposited on the insulating layer 17 and the contact plugs 21. The second conductive material is then selectively patterned to thereby form a conductive pattern 23 in contact with the contact plugs 21.
Meanwhile, as shown in FIG. 2B, the gate line 15 is also formed over the trench 13 beyond the active region 10.
Most conventional RF MOSFETs employ a gate having a large width. In such a case, a fringe of the gate line 15 is extended for contact to the element isolation region as shown in FIGS. 1 and 2A.
Also, in the above construction, since the trench 13 and the gate line 15 are overlapped with each other in a plurality of places, the parasitic capacitance Cgb between the gate line 15 and the trench 13 is increased as indicated at C in FIGS. 2A and 2B.
Because the operating frequency Ft, which is one of the important parameters of the RF MOSFET, has a functional relationship with the parasitic capacitance Cgb, an increase in the parasitic capacitance Cgb can adversely affect the operating frequency Ft. Specifically, if several (e.g., dozens) of gate fingers are used in order to enlarge the width of the gate line 15, the parasitic capacitance Cgb will be further increased.